SoC FPGA Family

Altera SoC FPGAs integrate an Arm-based hard processor system (HPS) consisting of processors, peripherals, and memory interfaces with the FPGA fabric using a high-bandwidth interconnect backbone. The devices combine the performance and power savings of hard intellectual property (IP) with the flexibility of programmable logic. These user-customizable Arm-based SoC FPGAs are ideal for reducing system power, cost, and board size by integrating discrete processors and digital signal processing (DSP) functions into a single FPGA. They differentiate the end product with custom hardware and software and add support for virtually any interface standard or protocol in the FPGA.

Lahat ng Resulta (72)

Pumili Larawan # ng Piyesa Mfr. Paglalarawan Datasheet Availability Pagpepresyo (PHP) I-filter ang mga resulta sa talahanayan ayon sa unit price batay sa iyong dami. Dami RoHS
Altera FPGA - Field Programmable Gate Array
84Inaasahan 3/2/2026
Min.: 1
Mult.: 1

Altera CPLD - Complex Programmable Logic Devices
1,752Inoorder
Min.: 1
Mult.: 1

Altera CPLD - Complex Programmable Logic Devices
350Inaasahan 4/6/2026
Min.: 1
Mult.: 1

Altera CPLD - Complex Programmable Logic Devices
287Inaasahan 6/18/2026
Min.: 1
Mult.: 1

Altera Development Software Quartus Prime Software Digital Delivery
Min.: 1
Mult.: 1
Altera FPGA - Field Programmable Gate Array Lead-Time para sa Hindi Naka-stock 16 (na) Linggo
Min.: 60
Mult.: 60

Altera FPGA - Field Programmable Gate Array
Lead-Time para sa Hindi Naka-stock 16 (na) Linggo
Min.: 60
Mult.: 60

Altera FPGA - Field Programmable Gate Array
Lead-Time para sa Hindi Naka-stock 16 (na) Linggo
Min.: 60
Mult.: 60

Altera FPGA - Field Programmable Gate Array Lead-Time para sa Hindi Naka-stock 16 (na) Linggo
Min.: 36
Mult.: 36

Altera FPGA - Field Programmable Gate Array
Lead-Time para sa Hindi Naka-stock 16 (na) Linggo
Min.: 36
Mult.: 36

Altera FPGA - Field Programmable Gate Array Lead-Time para sa Hindi Naka-stock 16 (na) Linggo
Min.: 36
Mult.: 36

Altera FPGA - Field Programmable Gate Array
Lead-Time para sa Hindi Naka-stock 16 (na) Linggo
Min.: 84
Mult.: 84

Altera FPGA - Field Programmable Gate Array Lead-Time para sa Hindi Naka-stock 16 (na) Linggo
Min.: 84
Mult.: 84

Altera FPGA - Field Programmable Gate Array
Lead-Time para sa Hindi Naka-stock 16 (na) Linggo
Min.: 84
Mult.: 84

Altera FPGA - Field Programmable Gate Array Lead-Time para sa Hindi Naka-stock 16 (na) Linggo
Min.: 84
Mult.: 84

Altera FPGA - Field Programmable Gate Array
Lead-Time para sa Hindi Naka-stock 16 (na) Linggo
Min.: 36
Mult.: 36

Altera FPGA - Field Programmable Gate Array
Lead-Time para sa Hindi Naka-stock 16 (na) Linggo
Min.: 84
Mult.: 84

Altera FPGA - Field Programmable Gate Array Lead-Time para sa Hindi Naka-stock 16 (na) Linggo
Min.: 84
Mult.: 84

Altera FPGA - Field Programmable Gate Array
Lead-Time para sa Hindi Naka-stock 16 (na) Linggo
Min.: 84
Mult.: 84

Altera CPLD - Complex Programmable Logic Devices Hindi Naka-stock
Min.: 176
Mult.: 176

Altera CPLD - Complex Programmable Logic Devices Hindi Naka-stock
Min.: 429
Mult.: 429

Altera CPLD - Complex Programmable Logic Devices Hindi Naka-stock
Min.: 429
Mult.: 429

Altera CPLD - Complex Programmable Logic Devices Hindi Naka-stock
Min.: 270
Mult.: 90

Altera Development Software Questa*-FPGA Edition Digital Delivery
Min.: 1
Mult.: 1
Altera Development Software Quartus II Software - Enables design separation add-on feature within Quartus II software. This product supports fixed node or floating node licensing and upgrades for one year. Requires an active Quartus II subscription. Digital Delivery
Min.: 1
Mult.: 1