DK-DEV-5SGSMD5N

Altera
989-DK-DEV-5SGSMD5N
DK-DEV-5SGSMD5N

Mfr.:

Paglalarawan:
Programmable Logic IC Development Tools FPGA Development Kit For 5SGSMD5K2

Lifecycle:
End of Life:
Naka-iskedyul para sa kalumaan at ihihinto na ng manufacturer.

May Stock: 2

Stock:
2 Maaaring Ipadala Agad
Lead-Time ng Pabrika:
2 (na) Linggo Tinatayang oras ng paggawa sa pabrika para sa mga bilang na mas marami kaysa ipinakita.
Minimum: 1   Mga Multiple: 1
Presyo ng Unit:
₱-.--
Ext. Presyo:
₱-.--
Est. Taripa:
LIBRENG Ipapadala ang Produktong Ito

Presyo (PHP)

Dami Presyo ng Unit
Ext. Presyo
₱405,679.84 ₱405,679.84

Katangian ng Produkto Value ng Attribute Pumili ng Attribute
Altera
Kategorya ng Produkto: Mga Tool sa Pag-develop ng Programmable Logic IC
Development Kits
FPGA
5SGSMD5K2F40C2N
Brand: Altera
Paglalarawan/Function: Stratix V development kit
Uri ng Interface: Ethernet, HSMC, JTAG, QSFP
Supply Voltage ng Pagpapatakbo: 19 V
Uri ng Produkto: Programmable Logic IC Development Tools
Series: Stratix V GS Development Kits
Dami ng Pack ng Pabrika: 1
Subcategory: Development Tools
Pangalang pangkalakal: Stratix V FPGA
Mga Alias ng # ng Piyesa : 979999
Timbang ng Unit: 2.642 kg
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further information.

5-0217-03

CNHTS:
8543709990
USHTS:
8473301180
TARIC:
8473302000
MXHTS:
8473300499
ECCN:
EAR99

DSP Development Kit, Stratix® V Edition

Altera DSP Development Kit, Stratix® V Edition, is a complete design environment with the hardware and software needed to develop Stratix V GS FPGA designs. The designer can test Altera's optimized variable-precision digital signal processing (DSP) block and develop DSP algorithms in a high-level model-based flow. They can test the signal quality of the FPGA transceiver I/Os (10 Gbps+) and develop and test PCI Express® (PCIe) 3.0 designs. The designer can develop and test memory subsystems consisting of SyncFlash, DDR3, and QDR™II+. This development kit allows for developing and testing SDI with the embedded 75ohm 3G SDI transceivers and developing embedded designs utilizing the Nios® II processor and external memory. A designer can develop and test network designs utilizing Triple Speed Ethernet MegaCore®, external RJ-45 jack, and optical networking designs using the 10Gbps and 40Gbps ethernet MAC MegaCores and the QSFP Optical Interface. Using the Clock Control GUI, a designer can also measure the FPGA's power consumption and control twelve different programmable clock oscillators.