Analog Devices Inc. ADAU1860/1860-1 Low Power Codecs with Audio DSPs
Analog Devices Inc. ADAU1860/1860-1 Low Power Codecs with Audio DSPs are codecs with three inputs and one output that incorporate two Digital Signal Processors (DSPs). These codecs optimize low latency and a programmable double-precision MAC engine for a maximum 24-stage equalizer. The ADAU1860/1860-1 codecs feature eight digital microphone inputs, 2 PDM output channels, and three differential or single-ended analog inputs configurable as microphone or line inputs. The ADAU1860 codec is only available for ordering by customers located in the People's Republic of China (PRC). The ADAU1860-1 codec is available for ordering by customers outside the PRC. Typical applications include noise-canceling headsets and headphones, personal navigation devices, musical instrument effect processors, multimedia speaker systems, and smartphones.
Features
- Programmable FastDSP audio processing engine:
- Up to 768kHz sample rate
- Biquad filters, limiters, volume controls, and mixing
- Tensilica HiFi 3z DSP core:
- Quad MAC per cycle: 24 x 24-bit multiplier and 64-bit accumulator
- 24.576MHz, 49.152MHz, 73.728MHz, and 98.304MHz flexible power operation mode
- 336kB total memory
- JTAG debug and trace
- Low latency, 24-bit ADCs, and DAC:
- 106dB SNR (signal through ADC with A-weighted filter)
- 110dB combined SNR (signal through DAC and headphones with A-weighted filter)
- Programmable double precision MAC engine for maximum 24-stage equalizer
- 8kHz to 768kHz serial port sample rates
- 5μs group delay (fS = 768kHz) analog into analog out with FastDSP bypass (zero instructions)
- 3 differential or single-ended analog inputs, configurable as a microphone or line inputs
- 8 digital microphone inputs
- Analog differential audio output, configurable as either line output or headphone drive
- 2 PDM output channels
- PLL supporting any input clock rate from 30kHz to 36MHz
- 4 channel Asynchronous Sample Rate Converters (ASRCs)
- 2, 16-channel serial audio ports supporting I2S, left justified, right justified, or up to TDM16 (TDM12 in Turbo mode)
- 8 interpolators and 8 decimators with flexible routing
- Power supplies:
- Digital I/O IOVDD at 1.1V to 1.98V
- Digital DVDD at 0.85V to 1.21V
- Headphone HPVDD at 1.8V typical
- Headphone HPVDD_L at 1.2V to HPVDD
- Control/communication interfaces:
- I2C, SPI, or UART control ports
- Master Quad SPI (QSPI)
- UART communication port
- Self-boot from QSPI flash
- Flexible GPIO and IRQ
- 56-ball, 0.35mm pitch, and 2.980mm x 2.679mm WLCSP package
- RoHS-compliant
Applications
- Noise-canceling handsets, headsets, and headphones
- Bluetooth® Active Noise Canceling (ANC) handsets, headsets, and headphones
- Personal navigation devices
- Digital still and video cameras
- Musical instrument effect processors
- Multimedia speaker systems
- Smartphones
System Block Diagram with Analog Microphones
Dimension Diagram
