NXP Semiconductors PCA961xDP 2-Channel Buffer
NXP PCA961xDP 2-Channel Multipoint Differential I2C-Bus Buffers are Fast-mode Plus (Fm+) SMBus/I2C-bus buffers that extend the normal single-ended SMBus/I2C-bus through electrically noisy environments using a differential SMBus/I2C-bus (dI2C) physical layer, which is transparent to the SMBus/I2C-bus protocol layer. These devices consist of two single-ended to differential driver channels for the SCL (serial clock), SDA (serial data). Using differential transmission lines between identical dI2C bus buffers, PCA961xDP removes electrical noise and common-mode offsets that are present when signal lines must pass between different voltage domains, are bundled with hostile signals, or run adjacent to electrical noise sources, such as high energy power supplies and electric motors. NXP PCA961xDP 2-Channel Multipoint Differential I2C-Bus Buffers are ideally suited for rugged high noise environments and/or longer cable applications, allow multiple slaves, and operate at bus speeds up to 1MHz clock rate. Cables can be extended to at least three meters (3m) or longer cable runs at lower clock speeds. The dI2C-bus buffers are compatible with existing SMBus/I2C-bus devices and can drive Standard, Fast-mode, and Fast-mode Plus devices on the single-ended side.Features
- New dI²C-bus buffers offer improved resistance to system noise and ground offset up to 1⁄2 of supply voltage
- 2 channel dI²C (differential I2C-bus) to Fm+ single-ended buffer operating up to 1MHz with 30mA SDA/SCL drive capability
- Compatible with I2C-bus Standard/Fast-mode and SMBus, Fast-mode Plus up to 1MHz
- Single-ended I2C-bus on card side up to 540pF
- Differential I2C-bus on cable side supporting multi-drop bus
- Maximum cable length: 3m (approximately 10 feet) (longer at lower frequency)
- dI²C output: 1.5V differential output with nominal terminals
- Differential line impedance (user-defined): 100Ω nominal suggested
- Receive input sensitivity: ±200mV
- Hysteresis: ±30mV typical
- Input impedance: high-impedance (1 MΩ typical)
- Receive input voltage range: -0.5V to +5.5V
- Supports arbitration and clock stretching across the dI²C-bus buffers
- Lock-up free operation
- Powered-off and powering-up high-impedance I2C-bus pins
- Operating supply voltage (VDD(A)) range of 2.3V to 5.5V with single-ended side 5.5V tolerant
- Differential I2C-bus operating supply voltage (VDD(B)) range of 3.0V to 5.5V, with 5.5V tolerant (the best operation is at 5V)
- ESD protection exceeds 2000V HBM per JESD22-A114 and 1000V CDM per JESD22-C101
- Latch-up testing is done to JEDEC Standard JESD78 which exceeds 100mA
- PCA9615 Features
- Hot-swap (allows insertion or removal of modules or card without disruption to bus data)
- EN signal (PCA9615 input) controls PCA9615 hot-swap sequence
- Bus idle detect (PCA9615 internal function) waits for a bus idle condition before the connection is made
Applications
- Monitor remote temperature/leak detectors in harsh environment
- Control of power supplies in high noise environment
- Transmission of I2C-bus between equipment cabinets
- Commercial lighting and industrial heating/cooling control
- Any application that requires long I2C-bus runs in electrically noisy environments
- Any application with multiple power suppliers and the potential for ground offsets up to 2.5V
Inilathala: 2015-01-15
| Na-update: 2022-11-03
