Texas Instruments ADC364x Analog to Digital Converters (ADCs)
Texas Instruments ADC364x Analog to Digital Converters (ADCs) are low-noise, ultralow-power, 14-bit, 10MSPS to 65MSPS dual-channel, high-speed ADCs. These ADC364x ADCs are designed for low power consumption and feature a noise spectral density of -155dBFS/Hz, combined with excellent linearity and dynamic range. The ADC364x ADCs consume only 72mW/ch at 65MSPS, and power consumption scales well with lower sampling rates.
The TI ADC364x provides excellent DC precision and IF sampling support, making it a perfect choice for various applications. It outputs data using a DDR or serial CMOS interface, offering the lowest-power digital interface and flexibility to minimize the number of digital interconnects. These devices are a pin-to-pin compatible family with different speed grades.
The ADC364x ADCs support the extended industrial temperature range of –40 to +105°C and are available in a 40-pin VQFN package.
Features
- Dual-channel
- 14-bit 10/25/65MSPS ADC
- Noise floor of -155dBFS/Hz
- Ultra-low power with optimized power scaling of 29mW/ch (10MSPS) to 72mW/ch (65MSPS)
- Latency is one clock cycle
- 14-Bit, no missing codes
- INL of ±0.6LSB; DNL: ±0.2LSB
- External or internal reference
- Industrial temperature range of –40°C to +105°C
- On-chip digital filter (optional)
- Decimation by 2, 4, 8, 16, 32
- 32-bit NCO
- DDR and serial CMOS interface
- Small footprint of 40-VQFN (5mm × 5mm) package
- Single 1.8V supply
- Spectral performance (fIN = 5MHz)
- SNR: 79.0dBFS
- SFDR: 93dBc HD2, HD3
- SFDR: 101dBFS worst spur
- Spectral performance (fIN = 64MHz)
- SNR of 74.0dBFS
- SFDR of 84dBc HD2, HD3
- SFDR of 90dBFS worst spur
Applications
- High-speed data acquisition
- Industrial monitoring
- Thermal imaging
- Imaging and sonar
- Software-defined radio
- Power quality
- Communications infrastructure
- High-speed control loops
- Instrumentation
- Smart grids
- Spectroscopy
- Radar
- Source measurement unit (SMU)
- GPS receiver
- Sonar
- Substation automation
Block Diagram
Inilathala: 2020-12-15
| Na-update: 2024-10-18